| 1 (2007) | |||||||||||||||
Abstract | |||||||||||||||
| In this paper, we study the problem of constructing a sorting circuit, network, or PRAM algorithm that is tolerant to faults. For the most part, we focus on fault patterns that are random, i.e., where the result of each comparison is independently faulty with probability upper-bounded by some constant. All previous fault-tolerant sorting circuits, networks, and parallel algorithms require\Omega\Gammaqui 2 n) depth and/or\Omega\Gamma n log 2 n) comparisons to sort n items. In this paper, we construct: ffl a passive-fault-tolerant sorting circuit with O(n log n log log n) comparators, thereby answering a question posed by Yao and Yao in 1985, ffl a reversal-fault-tolerant sorting network with O(n log log 2 3 n) comparators, thereby answering a question posed by Assaf and Upfal in 1990, and ffl a deterministic O(log n)-step O(n)-processor EREW PRAM fault-tolerant sorting algorithm, thereby answering a question posed by Feige, Peleg, Raghavan, and Upfal in 1990. The results are based on a new analysis of the AKS circuit, which uses a much weaker notion of expansion that can be preserved in the presence of faults. Previously, the AKS circuit was not believed to be fault-tolerant because the expansion properties that were believed to be crucial for the performance of the circuit are destroyed by random faults. Extensions of our results for worst-case faults are also presented. 1 | |||||||||||||||
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