The SPARK 2.0 system - a special purpose vector processor with a VectorPASCAL compiler (2008)
A. Formella, A. Obé, W. J. Paul, T. Rauber, D. Schmidt
This paper describes the architecture of the Spark 2.0 processor and introduces a compiler for VectorPascal. Features of the architecture are the flexible address generation during vector operations...
Indoor and Outdoor Channel Simulator Based on Ray Tracing (1997)
F. Aguado, F.P. Fontan, A. Formella
An efficient algorithm that dynamically calculates all possible ray paths in outdoor (macro- and micro-cells and land mobile satellite, LMS) and indoor environments is presented in this paper. The...
Building the 4 Processor SB-PRAM Prototype (1996)
P. Bach, M. Braun, A. Formella, J. Friedrich, Th. Grün, H. Leister, ...
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The physical processors simulate up to 32 virtual processors and are connected by a butterfly network to the...
Isolating the Reasons for the Performance of Parallel Machines on Numerical Programs (1993)
A. Formella, S. M. Müller, W. J. Paul, A. Bingert
: In this paper we present a nontrivial set of modules which measure performance parameters of node processors and interconnection networks. With the help of these parameters we explain the run time...
Isolating the Reasons for the Performance of Parallel Machines on Numerical Programs II (1992)
A. Formella, S.M. Müller, W. J. Paul, A. Bingert
In this paper we present a nontrivial set of modules which measure performance parameters of node processors and interconnection networks. With the help of these parameters we explain the run time of...
Cost Effectiveness of Data Flow Machines and Vector Processors (1992)
A. Formella, W. Massonne, W.J. Paul
. Proponents of data flow machines always emphasize the high potential for parallelization and the high performance on numerical applications reachable by that kind of architecture. On the other hand...