Complementary metrology within a European joint laboratory (2009)
Nutsch, A., Beckhoff, B., Altmann, R., Giubertoni, D., Hoenicke, P., ...
Sekowski, M., Steen, C., Nutsch, A., Birnbaum, E., Burenkov, A., Pichler, P.
Angular distributions of sputtered germanium atoms during the grazing incidence of argon ions were investigated. Argon ion beams with angles of incidence of 75° and 80° and with ion energy of 20...
Steen, C., Nutsch, A., Pichler, P., Ryssel, H.
During the fabrication process of integrated circuits, dopant atoms segregate to energetically favorable sites at the interface between silicon and silicon dioxide. Because of the continuously...
Chemical mechanical planarization (CMP) metrology for 45/32 nm technology generations (2007)
In-plane geometrical defects on wafer surfaces following Chemical Mechanical Planarization (CMP) processing in the lateral millimeter range and in vertical dimensions in the nanometer range are of...
Detection and review of crystal originated surface and sub surface defects on bare silicon (2007)
Nutsch, A., Funakoshi, T., Pfitzner, L., Steffen, R., Supplieth, F., Ryssel, H.
The continuous dimensional reduction for micro-and nano electronics is driving the technology for yield relevant defect detection. Defects originating in the crystal are always present in silicon...
Control of flatness for chemical mechanical planarization (2007)
To measure and control the topography of wafer surfaces at nanometer scale is essential for semiconductor manufacturing. Flatness control of chemical mechanical planarization requires compact...
Metrology, analysis and characterization in micro- and nanotechnologies: A European Challenge (2007)
Pfitzner, L., Nutsch, A., Öchsner, R., Pfeffer, M., Don, E., Wyon, C., ...
Europe offers excellent expertise in the area of metrology, analysis and characterization in micro- and nanotechnologies. This exper-tise is borne through research institutes, academia, small/medium...
Process optimization by means of integrated monitoring tools in the semiconductor industry (2007)
Pfitzner, L.H., Nutsch, A., Roeder, G., Schellenberger, M.
Semiconductor manufacturing still follows Moorés Law, stating a cost reduction of approximately 25 to 30 % per year, a value actu-ally achieved in the past 40 years. One of the key enablers for...
Polierverfahren in der Halbleiterfertigung (2004)
Pfitzner, L., Bär, E., Frickinger, J., Nguyen, H., Nutsch, A.
Wafer reclaim in semiconductor manufacturing (2003)
Frickinger, J., Nutsch, A., Pfitzner, L., Ryssel, H., Zielonka, G.