the Data Vortex Optical Interconnection Network (2009)
Cory Hawkins, Student Member, D. Scott Wills, Senior Member
Abstract—Reducing communication latency in multiprocessor interconnection networks can increase system performance on a broad range of applications. The data vortex photonic network reduces message...
Steven W. Bond, Olivier Vendier, Myunghee Lee, Sungyong Jung, Georgianna Dagnall, Martin Brooke, ...
Abstract — We present for the first time a three-dimensional (3-D) Si CMOS interconnection system consisting of three layers of optically interconnected hybrid integrated Si CMOS transceivers. The...
I. SHORT TO MICRO HAUL OPTOELECTRONIC LINKS (2008)
Nan M. Jokerst, Senior Member, Martin A. Brooke, J. Laskar, D. Scott Wills, Senior Member, ...
Abstract—The integration and packaging of optoelectronic devices with electronic circuits and systems has growing application in many fields, ranging from long to micro haul links. An exploration...
An Architectural Solution for the Inductive Noise Problem due to Clock-Gating Abstract (2008)
Mondira Deb, Pant Pankaj Pant, D. Scott Wills
As we approach Gigascale Integration, chip power consumption is becoming a critical system parameter. Clock-gating idle units provides needed reductions in power consumption. However, it introduces...
The Heterogeneous Integration of Optical Interconnections Into Integrated Microsystems (2008)
Nan Marie Jokerst, Martin A. Brooke, Sang-yeon Cho, Scott Wilkinson, Michael Vrazel, Suzanne Fike, ...
Abstract—Emerging techniques for integrating optoelectronic (OE) devices, analog interface circuitry, RF circuitry, and digital logic into ultra-mixed signal systems offers approaches toward and...
Scaling Up the Atlas Chip-Multiprocessor Peter G. Sassone (2008)
Student Member Ieee, D. Scott Wills, Senior Member
Abstract—Atlas, a dynamically multithreading chip-multiprocessor (CMP), gains little complexity as processing elements are added. When the model is scaled up with strategic layouts and realistic...
HiPER: A Compact Narrow Channel Router with Hop-by-Hop Error Correction (2008)
Phil May, Santithorn Bunchua, Student Member, D. Scott Wills, Senior Member
Abstract—Multiprocessor architectures demand efficient interprocessor communication to maximize system utilization and performance. To meet future demands, these interconnects must communicate at...
Bidirectional Single Fiber Low-Cost Optoelectronic Interconnect for Automotive Applications (2008)
Abelardo López-lagunas, Sek Meng Chai, J. Cross, B. Buchannan, Lawrence A. Carastro, S. Wang, ...
Abstract—Current trends in vehicular technology reflect an increase in the number of electronic modules, leading to more complicated and expensive wiring. The use of optic fibers offers a low-cost...
Analysis of area-time efficiency for an integrated focal plane (2008)
William H. Robinson, D. Scott Wills
architecture
Nan Marie Jokerst, Martin A. Brooke, Joy Laskar, D. Scott Wills, April S. Brown, Mary Ann Ingram
Multidisciplinary team-oriented research is an effective method for investigating systems spanning multiple knowledge areas. Building on cross-functional team strategies developed for highly...
The Data Vortex, an All Optical Path Multicomputer Interconnection Network (2008)
Cory Hawkins, Student Member, Benjamin A. Small, D. Scott Wills, Senior Member, Keren Bergman
Abstract—All optical path interconnection networks employing dense wavelength division multiplexing can provide vast improvements in supercomputer performance. However, the lack of efficient...
Real-Time Image Processing on a Focal Plane SIMD Array Antonio Gentile 1 (2008)
D. Scott Wills, Leugim Bustelo, José J. Figueroa, ...
Abstract. Real-time image processing applications have tremendous computational workloads and I/O throughput requirements. Operation in mobile, portable devices poses stringent resource limitations...
Sek M. Chai, Antonio Gentile, D. Scott Wills
Future military scenarios will rely on advanced imaging sensor technology beyond the visible spectrum to gain total battlefield awareness. Real-time processing of these data streams requires...
QUANTIZED COLOR INSTRUCTION SET FOR MEDIA-ON-DEMAND APPLICATIONS (2008)
This paper presents Quantized Color Pack extension (QCPX) ISA to accelerate performance of pixel-oriented media processing applications. The QCPX ISA (with a 32 hit word size) supports two packed,...
Nan Marie Jokerst, Senior Member, D. Scott Wills, Senior Member
Abstract—This paper evaluates the potential for the real-time utilization of high frame rate image sequences using a fully parallel readout system. Multiple readout architectures for high frame...
Reducing Operand Transport Complexity of Superscalar Processors using Distributed (2008)
Register Files, Santithorn Bunchua, D. Scott Wills, Linda M. Wills
A critical problem in wide-issue superscalar processors is the limit on cycle time imposed by the central register file and operand bypass network. In this paper, a distributed register file...
Vector quantization (VQ) is widely used for color image and video compression. However, its high computational overhead prohibits many applications in real-time systems. This paper presents a novel...
Incorporating Multi-Chip Module Packaging Constraints into System Design † (2007)
Vivek Garg, Steve Lacy, David E. Schimmel, Darrell Stogner, Craig Ulmer, D. Scott Wills, ...
Computer system design addresses the optimization of metrics such as cost, performance, power, and reliability in the presence of physical constraints. The advent of large area, low cost Multi-Chip...
Huy H. Cat, John C. Eble, D. Scott Wills, Vivek De Martin, Martin Brooke, Nan Marie Jokerst
Introduction Integrated optoelectronic interconnect offers a potentially lower cost, higher density alternative to wire-based technologies for I/O. For most applications, low cost IC packages provide...
Huy Cat Scott, D. Scott Wills, Nan Marie Jokerst, Martin Brooke, April Brown
High frame rate infrared scene generation depends on high performance digital processors that are tightly coupled to infrared emitter arrays. Massively parallel image generation hardware can realize...
Real-Time Image Processing on a Focal Plane SIMD Array (2007)
Antonio Gentile, D. Scott Wills, Leugim Bustelo, José J. Figueroa, ...
. Real-time image processing applications have tremendous computational workloads and I/O throughput requirements. Operation in mobile, portable devices poses stringent resource limitations (size,...
Approved by: ARCHITECTURAL ENHANCEMENTS FOR EFFICIENT OPERAND TRANSPORT IN MULTIMEDIA SYSTEMS (2006)
Dr. D. Scott Wills, S. Lee, R. Tannenbaum, ...
Dedicated to my grandmother, forever on my mind We never had a chance to say goodbye to each other and I never really had a chance to thank her for all she had done for me. This is my tribute to her....
William Cory Hawkins, Dr. D. Scott Wills, L. Owen Iii
ACKNOWLEDGEMENTS In the undertaking of this thesis research, there was the fortunate opportunity to collaborate with several individuals of differing disciplines. Special appreciation is hereby...
Static strands: Safely exposing dependence chains for increasing embedded power efficiency (2005)
Peter G. Sassone, D. Scott Wills, Gabriel H. Loh
Modern embedded processors are designed to maximize execution efficiency—the amount of performance achieved per unit of energy dissipated while meeting minimum performance levels. To increase this...
Jongmyon Kim, Linda M. Wills, D. Scott Wills
This paper presents an efficient two-stage filtering method that provides highly reliable 4:2:0 YCbCr signals, which are widely used in the image- and video-processing community. In the first phase,...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
As technology trends yield shorter cycle times and larger, wider datapaths in architectures for multimedia systems, global broadcast networks for operand communication are becoming a major bottleneck...
Circuits for Power, Performance and Reliability Approved by: (2005)
Yuvraj Singh Dhillon, Dr. D. Scott Wills, D. Singh
This dissertation is dedicated to my parents, Jaspal and Rajwant Dhillon, my sister, Monica and my wife, Puneet Acknowledgements I am grateful to my advisor, Dr. Abhijit Chatterjee, for his support...
Dr. Jeffrey Davis Advisor, Dr. D. Scott Wills
Dedicated to Sri Sri Ravi Shankar, or “Guruji ” as we call him … i ACKNOWLEDGEMENTS I would like to express my deepest gratitude toward my PhD advisor, Dr. Jeff Davis. It is his intelligent...
Architectural Enhancements for Color Image and Video Processing on Embedded Systems (2005)
Jongmyon Kim, Dr. D. Scott Wills, M. Wills, S. Lee, ...
This dissertation could not be completed without the aid and support of countless people over the past several years. I would like to thank everyone who influenced this work. First of all, I would...
Multicycle Broadcast Bypass: Too Readily Overlooked (2004)
Peter G. Sassone, D. Scott Wills
The bypass path, also called the forwarding path, allows processors to broadcast operands from one functional unit to another more quickly than through the register file. In modern superscalar...
Dynamic Strands: Collapsing Speculative Dependence Chains for Reducing Pipeline Communication (2004)
Peter G. Sassone, D. Scott Wills
In the modern era of wire-dominated architectures, specific effort must be made to reduce needless communication within out-of-order pipelines while still maintaining binary compatibility. To ease...
Portable Video Supercomputing (2004)
Antonio Gentile, D. Scott Wills, Senior Member
Abstract—As inexpensive imaging chips and wireless telecommunications are incorporated into an increasing array of portable products, the need for high efficiency, high throughput embedded...
As wireless video products evolve, they demand more sophisticated processing at higher resolutions and frame rates. Computational performance and energy efficiency have become critical design issues....
This paper investigates the use of both the luminance and chrominance components in color image and video processing algorithms and proposes a color-aware instruction set that improves the...
Santithorn Bunchua, Dr. D. Scott Wills, M. Wills, M. Blough, ...
This dissertation could not be completed without influences from several individuals, to whom I am grateful for their contributions, direct or indirect, to the completion of this research. Prof....
Multicycle Broadcast Bypass: Too Readily Overlooked (2004)
Peter G. Sassone, D. Scott Wills
The bypass path, also called the forwarding path, allows processors to broadcast operands from one functional unit to another more quickly than through the register file. In modern superscalar...
REDUCING COMMUNICATION THROUGH BUFFERS ON A SIMD ARCHITECTURE Approved by: (2004)
Jee W. Choi, Dr. D. Scott Wills, Dr. Hsien-hsin Lee, Dr. Sudhakar Yalamanchili
I would like to express my sincerest gratitude to my advisor, Dr. Donald Scott Wills for his guidance, support and encouragement throughout my time at Georgia Tech as a graduate student. Without his...
Modeling Technology Impact on Cluster Microprocessor Performance (2003)
Lucian Codrescu, Steve Nugent, Student Member, James Meindl, Life Fellow, D. Scott Wills, ...
Abstract—The growing speed gap between transistors and wire interconnects is forcing the development of distributed, or clustered, architectures. These designs partition the chip into small regions...
William H. Robinson, D. Scott Wills
Abstract. Monolithic integration of photodetectors, analog-to-digital converters, data storage, and digital processing can improve both the performance and the efficiency of future portable image...
High-performance and energy-efficient heterogeneous subword parallel instructions (2003)
High instruction throughput and energy efficiency are becoming increasingly important design requirements for embedded and mobile computing systems. This paper presents tlie Quantized Color Pack...
Systolic Opportunities for Multidimensional Data Streams (2002)
Sek M. Chai, D. Scott Wills, Senior Member
AbstractÐPortable image processing applications require an efficient, scalable platform with localized computing regions. This paper presents a newclass of area I/O systolic architecture to exploit...
Component modeling for an integrated digital pixel (2002)
William H. Robinson, Gregory E. Triplett, D. Scott Wills
Future portable imaging products can benefit from the integration of a detector, analog-to-digital converter, digital processing, and data storage within a single chip. One approach combines these...
Cost modeling for early image processing applications (2001)
William H. Robinson, D. Scott Wills
This paper describes a method to evaluate image applications mapped to a focal plane, processing array with a single pixel per processing element. An application is specified and compiled to a common...
Heterogeneous Architecture Models for Interconnect-Motivated System Design (2000)
Sek Meng Chai, Tarek M. Taha, D. Scott Wills, Senior Member, James D. Meindl, Life Fellow
Abstract—On-chip interconnect demand is becoming the dominant factor in modern processor performance and must be estimated early in the design process. This paper presents a set of heterogeneous...
Sek M. Chai, Antonio Gentile, D. Scott Wills
Gigascale Integration (GSI) enables a new generation of monolithic focal plane processing systems built with billion-transistor chips. As this technology matures, fundamental technology limitations...
Lucian Codrescu, D. Scott Wills, Senior Member, James Meindl
AbstractÐSingle-chip multiprocessors are an important research direction for future microprocessors. The stigma of this approach is that many important applications cannot be automatically...
Lucian Codrescu, D. Scott Wills
An important research direction for future microprocessors is the single-chip multiprocessor. The drawbacks of this approach are that many important applications cannot be automatically parallelized...
On Dynamic Speculative Thread Partitioning and the MEM-Slicing Algorithm (1999)
Lucian Codrescu, D. Scott Wills
A dynamic speculative multithreaded processor automatically extracts thread level parallelism from sequential binary applications without software support. The hardware is responsible for...
Lucian Codrescu, D. Scott Wills, James Meindl
Single-chip multiprocessors are an important research direction for future microprocessors. The stigma of this approach is that many important applications cannot be automatically parallelized. This...
W. Stephen Lacy, Ieee Computer Society, D. Scott Wills, Senior Member
Abstract—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconnect has...
Profiling for Input Predictable Threads (1998)
Lucian Codrescu, D. Scott Wills
Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or...
The J-Machine: A Retrospective (1998)
William Dally Andrew, Andrew Chang, Andrew Chien, Stuart Fiske, Waldemar Horwat, John Keen, ...
J-Machine provided a small set of efficient communication and synchronization mechanisms that were used to support a broad range of programming models. It also provided fast user-to-user messaging...
The J-Machine: A Retrospective (1998)
William Dally, Andrew Chang, Andrew Chien, Stuart Fiske, Waldemar Horwat, John Keen, ...
memory. The J-Machine provided a small set of efficient communication and synchronization mechanisms that were used to support a broad range of programming models. It also provided fast user-to-user...
Retrospective: the j-machine (1998)
William J. Dally, Andrew Chang, Andrew Chien, Stuart Fiskeg, Waldemar Horwat, John Keeng, ...
leven years ago, at ISCA 14, we published a paper titled, “Architecture of a Message-Driven Processor ” [l] marking the start of our J-Machine project at MIT. The project culminated with the...
Phil May, Jeffrey Cross, Abelardo Lopez-lagunas, Brent Buchanan, D. Scott Wills, Nan Marie Jokerst, ...
Abstract—This letter presents testing results of an integrated optoelectronic (OE) channel employing hop-by-hop error control circuitry based on cyclic redundancy codes (CRC) to improve the...
SIMPil: An OE Integrated SIMD Architecture for Focal Plane Processing Applications (1996)
Huy H. Cat, Antonio Gentile, John C. Eble, Myunghee Lee, Olivier Vendier, Young Joong Joo, ...
Focal plane processing applications present a growing computing need for portable telecomputing and videoputing systems. This paper demonstrates the integration of digital processing, analog...
The scalability and performance of multicomputer networks benefit from packaging schemes that distribute computing resources and interconnect uniformly in three-dimensional space. Backplane -based...
A ThreeDimensional High-Throughput Architecture Using Through-Wafer Optical Interconnect (1995)
D. Scott Wills, W. Stephen Lacy, Christophe Camperi-ginestet, Brent Buchanan, Huy H. Cat, Scott Wilkinson, ...
Abstract-This paper presents a three-dimensional, highly par-allel, optically interconnected system to process high-throughput stream data such as images. The vertical optical interconnections are...
High-Throughput, Low-Memory Applications on the Pica Architecture (1994)
D. Scott Wills, Huy H. Cat, José Cruz-rivera, W. Stephen Lacy, James M. Baker, John C. Eble, ...
Abstract—This paper describes Pica, a fine-grain, message-passing architecture designed to efficiently support high-throughput, low-memory parallel applications, such as image processing, object...
Pica: An Ultra-Light Processor for High-Throughput Applications (1993)
D. Scott Wills, W. Stephen Lacy, Huy Cat, Michael A. Hopper, Ashutosh Razdan, Sek M. Chai
This paper introduces Pica, a fine-grain, message passing architecture designed to efficiently support high-throughput parallel applications. The architecture minimizes overhead for basic parallel...