Scientific Commons: Eric Beyne

Thermal cycling reliability of SnAgCu and SnPb solder joints: a comparison for several IC-packages (2008)

Bart V, Mario Gonzalez, Paresh Limaye, Petar Ratchev, Eric Beyne

This paper deals with a comparison study between SnPb and SnAgCu solder joint reliability. The comparison is based on non-linear finite element modellin. Three packages have been selected: silicon...

Design of Test Modules for the Analysis of MCM Interconnects (2007)

Claudio Truzzi, Eric Beyne, Edwin Ringoot

A thin-film Multichip Module (MCM-D) switching unit, specifically designed for performance analysis of interconnection substrates, is described. A test approach is presented for the characterisation...

Analysis of the induced stresses in silicon during thermocompression Cu-Cu bonding of Cu-through-vias in 3D-SIC architecture (2007)

Eneman, Geert, Gonzalez, Mario, Vandevelde, Bart, Swinnen, Bart, Stoukatch, Serguei, ...

Prediction of the influence of induced stresses in silicon on CMOS Performance in a Cu-through-via interconnect technology (2007)

Gonzalez, Mario, Vandevelde, Bart, Swinnen, Bart, Eneman, Geert, Verheyen, Peter, ...

Thermal cycling reliability of SnAgCu and SnPb solder joints: a comparison for several IC-packages, (2007)

Gonzalez, Mario, Ratchev, Petar, Beyne, Eric

3D-SIP integration for autonomous sensor nodes (2006)

Winters, Christophe, Beyne, Eric, De Raedt, Walter

Analysis and modeling of power grid transmission lines (2006)

Brebels, Steven, Webers, Tomas, De Raedt, Walter, ...

Thermal management of future packaging systems: impact on design and requirements for passive/active cooling systems (2006)

Chen, Caroline, Vandecasteele, Bjorn, Beyne, Eric

Efficient link architecture for on-chip serial links and networks (2006)

Kuijk, Maarten, Brebels, Steven, De Raedt, Walter, ...

Constant impedance scaling paradigm for interconnect synthesis (2006)

Brebels, Steven, Kuijk, Maarten, De Raedt, Walter, ...

Extended global interconnect architecture for nano-CMOS technologies (2006)

Brebels, Steven, Kuijk, Maarten, De Raedt, Walter, ...

Constant impedance scaling paradigm for scaling LC transmission lines (2006)

Brebels, Steven, Kuijk, Maarten, De Raedt, Walter, ...

Wafer-level package interconnect options (2006)

Brebels, Steven, Kuijk, Maarten, Webers, Tomas, De Raedt, Walter, ...

3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 µm pitch through-Si vias (2006)

Ruythooren, Wouter, De Moor, Piet, Bogaerts, Lieve, Carbonell, Laure, ...

A modified electromigration test structure for flip chip interconnections (2006)

Webers, Tomas, Beyne, Eric, Mertens, Robert

Technologies for highly miniaturized autonomous sensor networks (2006)

Gyselinckx, Bert, Torfs, Tom, Leonov, Vladimir, Brebels, Steven, ...

Jungste Fortschritte in der Systemintegration und dem Packaging für MEMS (2005)

Baert, Kris, Beyne, Eric

Filigran gestapelt (2005)

Baert, Kris, Beyne, Eric

Advances in system integration and MEMS packaging (2005)

Baert, Kris, Beyne, Eric

3D Packaging issues for ultrasmall systems-in-a-cube (2005)

De Moor, Piet, Beyne, Eric

Sequential-rotation arrays of circulary polarized aperture antennas in the MCM-D technology (2005)

Brebels, Steven, Beyne, Eric

Recent advances in system integration and MEMS packaging (2005)

Baert, Kris, Beyne, Eric

Novel interconnect concepts toward large area x-ray detectors (2005)

John, Joachim, Beyne, Eric, Luhn, Ole, Lorenz, Anne; U0048075, Visschers, Jan, Heyne, Erik, ...

Investigation of the influence of UBM on lead free flip chip solder fatigue life by explicit finite element modeling of intermetallic layers (2005)

Limaye, Paresh; U0043880, Vandevelde, Bart, Labie, Riet, Ratchev, Petar, Beyne, Eric, Vandepitte, Dirk; U0007104, ...

3D Interconnect technology for space applications (2005)

De Moor, Piet, Baert, Kris, Beyne, Eric, Mertens, Robert, ...

Factors involved in performance optimisation of GHz chip-package co-design (2004)

Brebels, Steven, Rottenberg, Xavier, Vandevelde, Bart, Driessens, Evelien, ...

Analytical thermo-mechanical model for non-underfilled area array flip chip assemblies (2004)

Beyne, Eric

More than just a package - wafer-level packaging of MEMS (2004)

De Moor, Piet, Tilmans, Harrie, John, Joachim, Witvrouw, Ann, ...

Thermal cycling reliability of SnAgCu and SnPb solder joints: a comparison of for several IC-packages (2004)

Gonzalez, Mario, Ratchev, Petar, Beyne, Eric

Low temperature zero-level packaging of MEMS (2004)

Baert, Kris, Beyne, Eric, De Wolf, Ingrid, Tilmans, Harrie

Influence of printed circuit board properties on solder joint fatigue life of assembled IC packages (2004)

Gonzalez, Mario, Beyne, Eric

Pulsed DC sputtered aluminum nitride : a novel approach to control stress and C-axis orientation (2004)

Soussan, Philippe, O'Donnell, Kathy, Pan, Wanling; U0035302, D'Haen, Jan, Vanhoyland, Geert, Beyne, Eric, ...

Compact broadband resistance model for microstrip transmission lines (2004)

Brebels, Steven, De Raedt, Walter, Beyne, Eric

Extending on-die wiring hierarchy with wafer-level packaging concepts (2004)

Brebels, Steven, Webers, Tomas, De Raedt, Walter, ...

Lead free solder joint reliability estimation by finite element modelling, advantages, challenges and limitations (2004)

Gonzalez, Mario, Ratchev, Petar, Vanfleteren, Jan, Beyne, Eric

Selective cooling of microelectronics using electrostatic actuated liquid droplets - modelling and experiments (2004)

Vandevelde, Bart, Beyne, Eric

Trends beim Einbau von MEMS auf Wafer-Ebene (2003)

De Moor, Piet, Tilmans, Harrie, John, Joachim, Witvrouw, Ann, ...

Trends in wafer-level packaging of MEMS (2003)

De Moor, Piet, Tilmans, Harrie, John, Joachim, Witvrouw, Ann, ...

Modeling and characterization of the polymer stud grid array (PSGA) package: electrical, thermal and thermo-mechanical qualification (2003)

Vandevelde, Bart, Driessens, Evelien, Beyne, Eric, De Raedt, Walter, Pieters, Philip, ...

Characterisation, Modelling and Design of Bond-Wire Interconnects for Chip-Package Co-Design Insertion Loss (dB) (2003)

Chandrasekhar, Arun, Stoukatch, Serguei, Brebels, S., Balachandran, Jayaprakash, Beyne, Eric, De Raedt, W., ...

This work is a comprehensive experimental investigation of chip to package wirebond interconnects for chip-package co-design. Wirebonds are interconnect bottlenecks in RF design, but are difficult to...

Parameterised modelling of thermo-mechanical reliability for CSP assemblies (2003)

Beyne, Eric, Zhang, K.G.Q, Caers, J

Time domain performance of leadless CSPs extracted from scattering parameter measurements and circuit models (2003)

Beyne, Eric, De Raedt, Walter

Wafer-level packaging technology for extended global wiring and inductors (2003)

Carchon, Geert, Carbonell, Laure, Jenei, Snezana, Van Hove, Marleen, Decoutere, Stefaan, De Raedt, Walter, ...

High-Q RF inductors on standard silicon realized using wafer-level packaging techniques (2003)

Jenei, Snezana, Carbonell, Laure, Van Hove, Marleen, Decoutere, Stefaan, De Raedt, Walter, ...

Modified micro-macro thermo-mechanical modelling of ceramic ball grid array packages (2003)

Degryse, Dominiek, Beyne, Eric, Roose, E, Corlatan, D, Swaelen, G, ...

Road through the interconnect red brick wall (2003)

Beyne, Eric, Corporaal, Henk

Integrated high-frequency inductors using amorphous electrodeposited Co-P core (2002)

Beyne, Eric, Celis, J.P, De Boeck, Jo

Parameter study for the reliability of underfilled flip chip and CSP assemblies (2002)

Degryse, Dominiek, Beyne, Eric

Bonding on Cu: a new stress evaluation approach by Raman spectroscopy (2002)

Ho, Meng, Lam, Kan Wai, Ratchev, Petar, Stoukatch, Serguei, Beyne, Eric, ...

Thermal modeling and management in ultrathin chip stack technology (2002)

Pinel, Stèphane, Marty, Antoine, Tasselli, Josiane, Bailbe, Jean-Pierre, Beyne, Eric, Van Hoof, Rita, ...

This paper presents a thermal modeling for power management of a new three-dimensional (3-D) thinned dies stacking process. Besides the high concentration of power dissipating sources, which is the...

Multi-layer thin film MCM-D for the integration of high-performance wireless front-end systems (2001)

Pieters, P, De Raedt, Walter, Beyne, Eric

Polymer Stud Grid Array, a lead-free and economic CSP (2001)

Driessens, Evelien, Beyne, Eric, Van Puymbroeck, Jan, Heerman, M

Characterisation of the Polymer Stud Grid Array (PSGA), a lead-free CSP for high performance and high reliable packaging (2001)

Driessens, Evelien, Beyne, Eric, Van Puymbroeck, Jan, Heerman, M

The PSGA, a lead-free CSP for high performance and high reliable packaging (2001)

Driessens, Evelien, Beyne, Eric, Van Puymbroeck, Jan, Heerman, M

A quantitative study of the adhesion between copper, barrier and organic low-k polymers (2001)

Brongersma, Sywert, Varga, Istvan, Bender, Hugo, Beyne, Eric

Adhesion study between materials for integration of copper and inorganic low-k dielectrics (2001)

Lanckmans, Filip; U0002198, Brongersma, Sywert, Poortmans, Jef, Conard, Thierry, Bender, Hugo, Beyne, Eric, ...

Chip package co-design of a 5GHz RF front-end for WLAN (2000)

Donnay, Stephane, Pieters, Philip, Diels, Wim, Vaesen, Kristof, De Raedt, Walter, ...

Electrodeposition for the synthesis of microsystems (2000)

Attenborough, Karen, Beerten, Steven, Merken, Patrick, Beyne, Eric, ...

High-Q spiral inductors for high performance integrated RF front-end sub-systems (2000)

Vaesen, Kristof, Brebels, Steven, De Raedt, Walter, Beyne, Eric, ...

A quantitative study of the adhesion between copper, barrier and organic low-k polymers (2000)

Lanckmans, Filip; U0002198, Brongersma, Sywert, Varga, Istvan, Beyne, Eric, Maex, Karen; U0007497

Chip-package codesign of a low-power 5-GHz RF front end (2000)

Pieters, Philip, Vaesen, Kristof, Diels, Wim, De Raedt, Walter, ...

Residual thermomechanical stresses in thinned-chip assemblies (2000)

Leseduarte Cuevas, Sergio, Marco Colás, Santiago, Beyne, Eric, Van Hoof, Rita, Marty, Antoine, Pinel, Stèphane, ...

A new technology for the three-dimensional (3-D) stacking of very thin chips on a substrate is currently under development within the ultrathin chip stacking (UTCS) Esprit Project 24910. In this...

Chip-package co-design of a 4.7 GHz VCO (1999)

Vaesen, Kristof, Pieters, Philip, Diels, Wim, De Raedt, Walter, ...

The kinetics of the early stages of electromigration and concurrent temperature induced processes in thin film metallisations studied by means of an in-situ high resolution resistometric technique (1999)

Manca, Jean, De Ceuninck, Ward, De Schepper, Luc, D'Haeger, V, Witvrouw, Ann, ...

Numerically efficient spatial-domain moment method for multislot transmission lines in layered media - Application to multislot lines in MCM-D technology (1999)

Pieters, Philip, Beyne, Eric

2x2 and 4x4 arrays of annular slot antennas in MCM-D technology fed by coplanar CPW networks (1999)

Brebels, Steven, Beyne, Eric

Electrodeposition for the synthesis of microsystems (1999)

Attenborough, Karen, Beerten, Steven, Merken, Patrick, Beyne, Eric, ...

Integrated antennas in MCM-D: examples and new possibilities for integrated systems (1999)

Pieters, Philip, Brebels, Steven, Soliman, Ezzeldin; U0013000, De Raedt, Walter, Beyne, Eric