Moray Mclaren

Corona: System Implications of Emerging Nanophotonic Technology (2009)

Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray Mclaren, Marco Fiorentino, Al Davis, ...

We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance, memory and...

A Finmeccanica Company QsNet II: An Interconnect for Supercomputing Applications * (2008)

Jon Beecroft, David Addison, Fabrizio Petrini, Moray Mclaren

The QsNet II network has been designed to optimize the interprocessor communication performance in systems constructed from standard server building blocks. In order to achieve this, the network...

NETWORK DESIGN QSNET II OPTIMIZES INTERPROCESSOR COMMUNICATION IN SYSTEMS BUILT FROM STANDARD SERVER BUILDING BLOCKS. ITS SHORT-MESSAGE PROCESSING UNIT PERMITS FAST INJECTION OF SMALL MESSAGES, PROVIDING ULTRA-LOW LATENCY AND SCALABILITY TO THOUSANDS OF N (2008)

Jon Beecroft, David Addison, David Hewson, Moray Mclaren, Duncan Roweth, Fabrizio Petrini, ...

Cluster computers—parallel computers built from commodity processors—are becoming the predominant supercomputer architecture because of their combined scalable performance and attractive price....

A Finmeccanica Company QsNet II: An Interconnect for Supercomputing Applications * (2008)

Jon Beecroft, David Addison, Fabrizio Petrini, Moray Mclaren

The QsNet II network has been designed to optimize the interprocessor communication performance in systems constructed from standard server building blocks. In order to achieve this, the network...