FLAW: FPGA Lifetime AWareness ABSTRACT (2009)
Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, N. Vijaykrishnan
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vulnerable to permanent...
Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, N. Vijaykrishnan, Chita R. Das
Abstract—The notion of a Network-on-Chip (NoC) is rapidly gaining a foothold as the communication fabric in complex System-on-Chip (SoC) architectures. Scalability is the NoC's most valuable...
1 Process Variation Aware Parallelization Strategies (2009)
For Mpsocs, Suresh Srinivasan, Raghavan Ramadoss, N. Vijaykrishnan
Abstract — Scaling of microprocessors is aggravating the gap between design and manufacturing expectations. Such variations may lead to manufacturing of processors cores with frequencies lower or...
How can hardware support Just-In-Time compilation? (2009)
A. Murthy, N. Vijaykrishnan, A. Sivasubramaniam
Just-In-Time (JIT) compiler is an e cient and preferred style of implementing the Java Virtual Machine (JVM) on resource-rich machines. Using a JIT compiler, the bytecodes are translated to native...
Compiler-Directed Array Interleavingfor Reducing Energy in Multi-Bank Memories \Lambda (2009)
V. Delaluz, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam, I. Kolcuymicrosystems, Design Lab
Abstract With the increased use of embedded/portable devices suchas smart cellular phones, pagers, PDAs, hand-held computers, and CD players, improving energy efficiency is becominga critical issue....
A holistic approach to designing energy-efficient cluster interconnects (2009)
Eun Jung Kim, Gregm. Link, Student Member, N. Vijaykrishnan, Mahmut K, Mary J. Irwin, ...
Abstract—Designing energy-efficient clusters has recently become an important concern to make these systems economically attractive for many applications. Since the cluster interconnect is a major...
Detecting SEU-caused Routing Errors in SRAM-based FPGAs (2008)
E. Syam, Sundar Reddy, Vikram Chandrasekhar, M. Sashikanth, V. Kamakoti, Chennai India, ...
This paper proposes a new CLB architecture for FPGAs and an associated testing technique that detects routing errors caused by SEUs in the SRAM configuration memory of the FPGA. The proposed testing...
Energy E cient Datapath Synthesis Using Dynamic Frequency Clocking and Multiple Voltages (2008)
Vamsi Krishna, N. Ranganathan, N. Vijaykrishnan
In this paper, we propose an energy e cient synthesis technique for datapath circuits. Speci cally, we propose a time and resource constrained scheduling algorithm, (DFMVS), which utilizes the...
Priya Sundararajan, Sridhar Krishnamurthy, N Vijaykrishnan, Kamal Chaudhary, Rajeev Jayaraman
Abstract — Platform FPGAs have introduced complex reconfigurable black-boxes for complete system on chip implementation. With rising expectations from these architectures there is a need to perform...
Temperature and Voltage Scaling Effects on Electrical Masking (2008)
R. Rajaraman, K. Ramakrishnan, N. Vijaykrishnan, Y. Xie, M. J. Irwin
Abstract — Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on memory elements. Recent works have looked at modeling and estimating...
Lin Li, N. Vijaykrishnan, Mahmut K, Mary Jane Irwin
Crosstalk between wires, caused by increased capacitive coupling, is considered one of the major factors that affect the performance of interconnects such as buses. The datadependent nature of...
Soft errors in adder circuits (2008)
R. Ramanarayanan, N. Vijaykrishnan, Y. Xie, M. J. Irwin
Soft errors in combinational circuits are catching up with errors in memory elements [1]. Continuous device scaling and increasing pipeline lengths contribute to the increase in soft error rates in...
Implementing LDPC Decoding on Network-On-Chip (2008)
T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin
Low-Density Parity Check codes are a form of Error Correcting Codes used in various wireless communication applications and in disk drives. While LDPC codes are desirable due to their ability to...
SESEE: A Soft Error Simulation and Estimation Engine (2008)
V Degalahal, N Vijaykrishnan, M J Irwin
Soft errors are radiation induced ionization events that upset the logic state of the circuit. The sources of these radiations are cosmic in origin; hence traditionally these upsets affected the...
ABSTRACT Analyzing Heap Error Behavior in Embedded JVM Environments (2008)
G. Chen, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin
Recent studies have shown that transient hardware errors caused by external factors such as alpha particles and cosmic ray strikes can be responsible for a large percentage of system down-time....
Abstract How can hardware support Just-In-Time compilation? (2008)
A. Murthy, N. Vijaykrishnan, A. Sivasubramaniam
Just-In-Time (JIT) compiler is an e cient and preferred style of implementing the Java Virtual Machine (JVM) on resource-rich machines. Using a JIT compiler, the bytecodes are translated to native...
A Compiler-Based Approach for Dynamically Managing Scratch-Pad Memories in Embedded Systems (2008)
Mahmut K, Associate Member, J. Ramanujam, Mary Jane Irwin, N. Vijaykrishnan, Associate Member, ...
Abstract—Optimizations aimed at improving the efficiency of on-chip memories in embedded systems are extremely important. Using a suitable combination of program transformations and memory design...
ABSTRACT Compiler-Directed Cache Polymorphism (2008)
J. S. Hu, N. Vijaykrishnan, M. J. Irwin, H. Saputra, W. Zhang
Classical compiler optimizations assume a xed cache architecture and modify the program to take best advantage of it. In some cases, this may not be the best strategy because each loop nest might...
Compiler Support for Reducing Leakage Consumption Energy (2008)
W. Zhang, N. Vijaykrishnan, M. J. Irwin, V. De
Current trends indicate that leakage energy consumption will be an important concern in upcoming process technologies. In this paper, we propose a compiler-based leakage energy optimization strategy....
J. S. Hu, N. Vijaykrishnan, M. J. Irwin, H. Saputra, W. Zhang
State-of-the-art microprocessors normally employ large cache structures; Fixed cache structures are wasted due to ineffective utilization; Traditional loop optimizations may not be available due to...
High Performance Array Processor for Video Decoding (2008)
J. Lee, N. Vijaykrishnan, M. J. Irwin
Abstract high NRE cost. Therefore, general purpose programmable processors using software to perform In this paper, high performance array processor for signal processing algorithms with high...
Variation Impact on SER of Combinational Circuits (2008)
K. Ramakrishnan, R. Rajaraman, S. Suresh, N. Vijaykrishnan, Y. Xie, M. J. Irwin
Increasing variability not only affects the behavior of contemporary ICs but also their vulnerability to transient error phenomenon especially radiation induced soft errors. Such variations in device...
G. M. Link, N. Vijaykrishnan, M. J. Irwin
As technology scales, thermal issues are becoming a significant factor in chip design. Ever increasing transistor densities and increasing leakage currents result in high power dissipation, and...
Impact of NBTI on FPGAs ∗ (2008)
K. Ramakrishnan, S. Suresh, N. Vijaykrishnan, M. J. Irwin
Device scaling such as reduced oxide thickness and high electric field has given rise to various reliability concerns. One such growing issue of concern is the degradation of PMOS devices due to...
Implementing LDPC Decoding on Network-On-Chip (2008)
T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin
Low-Density Parity Check (LDPC) codes are a form of Error Correcting Codes (ECC) used in various wireless communication applications and in disk drives. While LDPC codes are desirable due to their...
M.J.: Thermal-Aware Task Allocation and Scheduling for Embedded Systems (2008)
W-l. Hung, Y. Xie, N. Vijaykrishnan, M. J. Irwin
Temperature affects not only the reliability but also the performance, power, and cost of the embedded system. This paper proposes a thermal-aware task allocation and scheduling algorithm for...
Understanding and Improving Operating System Effects in Control Flow Prediction (2008)
Tao Li T, N. Vijaykrishnan, Juan F:lubio T
Many modern applications result in a significant operating system (OS) component. The OS component has several implications including affecting the control flow transfer in the execution environment....
AN EFFICIENT IMPLEMENTATION OF HIERARCHICAL IMAGE CODING (2008)
J. Lee, N. Vijaykrishnan, M. J. Irwin, R. Ch
ABSTRACT The third issues are compatibility and scalability. An efficient technique for hierarchical image coding is proposed, which divides an image into its multiple resolution versions with...
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J. S. Hu, A. Nadgir, N. Vijaykrishnan, M. J. Irwin
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Chapter 10 COMPILER OPTIMIZATIONS FOR LOW POWER SYSTEMS (2008)
Mahmut K, N. Vijaykrishnan, Mary Jane Irwin
Abstract Most current compiler optimizations focus on improving execution time. With the increasingly widespread use of embedded systems, however, power/energy consumption is also becoming an...
Reducing dTLB Energy Through Dynamic Resizing £ (2008)
V. Delaluz, A. Sivasubramaniam, M. J. Irwin, N. Vijaykrishnan
Translation Look-aside Buffer (TLB), which is small Content Addressable Memory (CAM) structure used to translate virtual addresses to physical addresses, can consume significant energy in some...
J. S. Hu, N. Vijaykrishnan, M. J. Irwin, H. Saputra, W. Zhang
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Temperature and Voltage Scaling Effects on Electrical Masking (2008)
R. Rajaraman, K. Ramakrishnan, N. Vijaykrishnan, Y. Xie, M. J. Irwin
Abstract — Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on memory elements. Recent works have looked at modeling and estimating...
Eun Jung Kim, Greg M. Link, Ki Hwan Yum, N. Vijaykrishnan, Mahmut K, Mary J. Irwin, ...
Abstract — Designing energy-efficient clusters has recently become an important concern to make these systems economically attractive for many applica-tions. Since the cluster interconnect is a...
fgchen,kandemir,vijay,mjigcse.psu.edu (2008)
G. Chen, N. Vijaykrishnan, M. J. Irwin, M. Wolczko
Java is becoming the main software platform for consumer and embedded devices such as mobile phones, PDAs, TV set-top boxes, and in-vehicle systems. Since many of these systems are memory...
Sequential Tests for Integrated Circuit Failures (2007)
R. Chandramouli, N. Vijaykrishnan, N. Ranganathan
this paper, we propose a sequential test strategy [14] to determine the region of operation of the ICs in shortest average time (equivalently with the smallest average number of devices). The...
Functional Reconfiguration For Fault-Tolerance: A New Approach (2007)
N. Vijaykrishnan, R. Chandramouli, N. Ranganathan
Reliability and speed are two main requirements of a VLSI design. Rapidly increasing device densities cause serious reliability concerns that have been mostly addressed using fault reconfiguration....
L. Li, I. Kadayif, Y-f. Tsai, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam
Energy management is important for a spectrum of systems ranging from high-performance architectures to lowend mobile and embedded devices. With the increasing number of transistors, smaller feature...
S. Kim, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin, E. Geethanjali
This paper focuses on partitioning the cache resources architecturally for energy and energy-delay optimizations. Specifically, we investigate ways of splitting the cache into several smaller units,...
Instruction Cache Leakage Management ABSTRACT (2007)
J. S. Hu, A. Nadgir, N. Vijaykrishnan, M. J. Irwin
Leakage energy optimization for caches has been the target of much recent effort. In this work, we focus on instruction caches and tailor two techniques that exploit the two major factors that shape...
Design Considerations for Databus Charge Recovery (2007)
Benjamin Bishop, Victor Lyuboslavsky, N. Vijaykrishnan, Mary Jane Irwin
Abstract | The charge recovery databus is a scheme which reduces energy consumption through the application of adiabatic circuit techniques. Previous work [2] gives a solid theoretical analysis of...
Energy Optimization Using Object Co-Location in Java (2007)
S. Tomar, N. Vijaykrishnan, R. Shetty, M. J. Irwin
With the paradigm shift in computer systems towards ubiquitous computing, energy, together with performance, has become an important parameter to measure efficiency. Java is increasingly becoming the...
Exploiting Value Locality for Secure-Energy Aware Communication (2007)
H. Saputra, N. Vijaykrishnan, M. Kandemir, R. Brooks, M. J. Irwin
Minimizing energy consumption is important for prolonging the life of battery-powered sensor nodes. A major portion of a sensor power budget in a distributed sensor network is consumed by...
Masking the Energy Behavior of Encryption Algorithms (2007)
H. Saputra, N. Vijaykrishnan, M. J. Irwin, R. Brooks
Smart cards are vulnerable to both invasive and non-invasive attacks. Specifically, non-invasive attacks using power and timing measurements to extract the cryptographic key has drawn a lot of...
Lin Li, N. Vijaykrishnan, Mahmut K, Mary Jane Irwin
With dramatic scaling in feature sizes, noise resilience is becoming one of the most important design parameters, similar to performance and energy efficiency. Noise resilience is particularly...
Reducing dTLB Energy Through Dynamic Resizing (2007)
V. Delaluz, A. Sivasubramaniam, M. J. Irwin, N. Vijaykrishnan
Translation Look-aside Buffer (TLB), which is small Content Addressable Memory (CAM) structure used to translate virtual addresses to physical addresses, can consume significant energy in some...
Impact of Process Scaling on the Efficacy of Leakage Reduction Schemes (2007)
Yuh-fang Tsai, David Duarte, N. Vijaykrishnan, Mary Jane Irwin
The effects of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) are evaluated by determining their limits and...
Scheduling Reusable Instructions for Power Reduction (2007)
J. S. Hu, N. Vijaykrishnan, S. Kim, M. Kandemir, M. J. Irwin
In this paper, we propose a new issue queue design that is capable of scheduling reusable instructions. Once the issue queue is reusing instructions, no instruction cache access is needed since the...
A GENERIC RECONFIGURABLE NEURAL NETWORK ARCHITECTURE IMPLEMENTED AS A NETWORK ON CHIP (2007)
T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin
Neural Networks are widely used in pattern recognition, security applications and data manipulation. We propose a novel hardware architecture for a generic neural network, using Network on Chip (NoC)...
Field Level Analysis for Heap Space Optimization in Embedded Java Environments ∗ ABSTRACT (2007)
Guangyu Chen, Mahmut K, N. Vijaykrishnan, Mary Janie Irwin, Storage Management
Memory constraint presents one of the critical challenges for embedded software writers. While circuit-level solutions based on cramming as many bits as possible into the smallest area possible are...
A novel dimensionally-decomposed router for on-chip communication in 3D architectures (2007)
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, N. Vijaykrishnan, ...
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities and burgeoning die...
A novel dimensionally-decomposed router for on-chip communication in 3D architectures (2007)
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, N. Vijaykrishnan, ...
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities and burgeoning die...
SEAT-LA: A soft error analysis tool for combinational logic (2006)
R. Rajaraman, J. S. Kim, N. Vijaykrishnan, Y. Xie, M. J. Irwin
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to develop techniques to...
SEAT-LA: A soft error analysis tool for combinational logic (2006)
R. Rajaraman, R. Rajaraman, J. S. Kim, J. S. Kim, N. Vijaykrishnan, N. Vijaykrishnan, ...
this paper, we propose a new approach, which can be applied to designs that use cell libraries characterized for soft error analysis and utilizes analytical equations to model the propagation of a...
FLAW: FPGA Lifetime AWareness (2006)
Suresh Srinivasan Prasanth, Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, N. Vijaykrishnan
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vulnerable to permanent...
Transaction Level Error Susceptibility Model for Bus Based SoC Architectures (2006)
Lin Srinivasan Vijaykrishnan, S. Srinivasan, N. Vijaykrishnan
System on Chip architectures have traditionally relied upon bus based interconnect for their communication needs. However, increasing bus frequencies and the load on the bus calls for focus on...
Exploring Fault-Tolerant Network-on-Chip Architectures (2006)
Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, N. Vijaykrishnan, Chita R. Das
The advent of deep sub-micron technology has exacerbated reliability issues in on-chip interconnects. In particular, single event upsets, such as soft errors, and hard faults are rapidly becoming a...
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers (2006)
Chrysostomos A. Nicopoulos, Dongkook Park, Jongman Kim, N. Vijaykrishnan, Mazin S. Yousif, Chita R. Das
The advent of deep sub-micron technology has recently highlighted the criticality of the on-chip interconnects. As diminishing feature sizes have led to increases in global wiring delays,...
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers (2006)
Chrysostomos A. Nicopoulos, Dongkook Park, Jongman Kim, N. Vijaykrishnan, Mazin S. Yousif, Chita R. Das
The advent of deep sub-micron technology has recently highlighted the criticality of the on-chip interconnects. As diminishing feature sizes have led to increases in global wiring delays,...
Analysis of Error Recovery Schemes for Networks on Chips (2005)
Murali, S., De Micheli, G., Benini, L., Theocharides, T., Vijaykrishnan, N., Irwin, M.J.
In this article, we discuss design constraints to characterize efficient error recovery mechanisms for the NoC design environment. We explore error control mechanisms at the data link and network...
Compiler-Directed Instruction Duplication for Soft Error Detection (2005)
Hu, Jie S., Li, Feihui, Degalahal, Vijay, Kandemir, Mahmut, Vijaykrishnan, N., Irwin, Mary J.
In this work, we experiment with complier-directed instruction duplication to detect soft errors in VLIW datapaths. In the proposed approach, the compiler determines the instruction schedule by...
Yang, Shengqi, Wolf, Wayne, Vijaykrishnan, N., Serpanos, D. N., Xie, Yuan
A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques that can protect...
Thermal-Aware Task Allocation and Scheduling for Embedded Systems (2005)
Xie, Y., Vijaykrishnan, N., Kandemir, M., Irwin, M. J.
Temperature affects not only the reliability but also the performance, power, and cost of the embedded system. This paper proposes a thermal-aware task allocation and scheduling algorithm for...
Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip (2005)
Link, G. M., Vijaykrishnan, N.
Many existing thermal management techniques focus on reducing the overall power consumption of the chip, and do not address location-specific temperature problems referred to as hotspots. We propose...
Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures (2005)
Srinivasan, Suresh, Li, Lin, Vijaykrishnan, N.
In this paper, we provide a methodology to perform both bus partitioning and bus frequency assignment to each of the bus segment simultaneously while optimizing both power consumption and performance...
Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip (2005)
Link, G. M., Vijaykrishnan, N.
Many existing thermal management techniques focus on reducing the overall power consumption of the chip, and do not address location-specific temperature problems referred to as hotspots. We propose...
Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures (2005)
Srinivasan, Suresh, Li, Lin, Vijaykrishnan, N.
In this paper, we provide a methodology to perform both bus partitioning and bus frequency assignment to each of the bus segment simultaneously while optimizing both power consumption and performance...
Thermal-Aware Task Allocation and Scheduling for Embedded Systems (2005)
Xie, Y., Vijaykrishnan, N., Kandemir, M., Irwin, M. J.
Temperature affects not only the reliability but also the performance, power, and cost of the embedded system. This paper proposes a thermal-aware task allocation and scheduling algorithm for...
Compiler-Directed Instruction Duplication for Soft Error Detection (2005)
Hu, Jie S., Li, Feihui, Degalahal, Vijay, Kandemir, Mahmut, Vijaykrishnan, N., Irwin, Mary J.
In this work, we experiment with complier-directed instruction duplication to detect soft errors in VLIW datapaths. In the proposed approach, the compiler determines the instruction schedule by...
Yang, Shengqi, Wolf, Wayne, Vijaykrishnan, N., Serpanos, D. N., Xie, Yuan
A novel power attack resistant cryptosystem is presented in this paper. Security in digital computing and communication is becoming increasingly important. Design techniques that can protect...
Thermal-aware floorplanning using genetic algorithms (2005)
W-l. Hung, Y. Xie, N. Vijaykrishnan, C. Addo-quaye, T. Theocharides, M. J. Irwin
In this work, we present a genetic algorithm based thermal-aware floorplanning framework that aims at reducing hot spots and distributing temperature evenly across a chip while optimizing the...
Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty (2005)
Yuh-fang Tsai, N. Vijaykrishnan, Yuan Xie, Mary Jane Irwin
One of the main challenges for design in the presence of process variations is to cope with the uncertainties in delay and leakage power. In this paper, the influence of leakage reduction techniques...
Three-dimensional cache design exploration using 3dcacti (2005)
Yuh-fang Tsai, Yuan Xie, N. Vijaykrishnan, Mary Jane Irwin
As technology scales, interconnects dominate the performance and power behavior of deep submicron designs. Three-dimensional integrated circuits (3D ICs) have been proposed as a way to mitigate the...
PennBench: A benchmark suite for embedded Java (2005)
G. Chen, N. Vijaykrishnan, M. J. Irwin
Currently, there are 23 million Java-enabled handsets with more than 50 different models from 17-plus suppliers. With the growing popularity of such devices, there is a need in the embedded industry...
Temperature-Aware Voltage Islands Architecting in System-on-Chip Design (2005)
G. M. Link, Yuan Xie, N. Vijaykrishnan, N. Dhanwadaý, J. Conner
Analysis of error recovery schemes for networks on chips (2005)
Srinivasan Murali, Theocharis Theocharides, Luca Benini, Giovanni De Micheli, N. Vijaykrishnan, Mary Jane Irwin
Network on Chip (NoC) interconnects based on packet-switched communication have been recently proposed for providing scalable and reliable on-chip communication. Due to shrinking transistor sizes and...
Hotspot prevention through runtime reconfiguration in NoC (2005)
Many existing thermal management techniques focus on reducing the overall power consumption of the chip, and do not address location-specific temperature problems referred to as hotspots. We propose...
Three-dimensional cache design exploration using 3dcacti (2005)
Yuh-fang Tsai, Yuan Xie, N. Vijaykrishnan, Mary Jane Irwin
As technology scales, interconnects dominate the performance and power behavior of deep submicron designs. Three-dimensional integrated circuits (3D ICs) have been proposed as a way to mitigate the...
Hotspot Prevention Through Runtime (2005)
G. M. Link, G. M. Link, N. Vijaykrishnan, N. Vijaykrishnan
Many existing thermal management techniques focus on reducing the overall power consumption of the chip, and do not address location-specific temperature problems referred to as hotspots. We propose...
A Low Latency Router Supporting Adaptivity for On-Chip Interconnects (2005)
Jongman Kim, Dongkook Park, T. Theocharides, N. Vijaykrishnan, Chita R. Das
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on-Chip (NoC) have been...
Soft Error and Energy Consumption Interactions: A Data Cache Perspective (2004)
Lin Li, Vijay Degalahal, N. Vijaykrishnan, Mahmut K, Mary Jane Irwin
Energy-efficiency and reliability are two major design constraints influencing next generation system designs. In this work, we focus on the interaction between power consumption and reliability...
The effect of threshold voltages on soft error rate (2004)
V. Degalahal, R. Ramanarayanan, N. Vijaykrishnan, Y. Xie, M. J. Irwin
Reliability-aware co-synthesis for embedded systems (2004)
L. Li, Y. Xie, N. Vijaykrishnan, M. J. Irwin
As technology scales, transient faults due to single event upsets have emerged as a key challenge for reliable embedded system design. This paper proposes a design methodology that incorporates...
Inverse Discrete Cosine Transform Architecture Exploiting (2004)
J. Lee, N. Vijaykrishnan, M. J. Irwin
ABSTRACT A row-column decomposition method has been In this paper, a novel architecture for 2-D IDCT is proposed, based on the sparseness property of 2-D DCT coefficient matrix and the even and odd...
W. Hung, Y. Xie, N. Vijaykrishnan, M. J. Irwin, Y. Tsai
In this paper, we present an algorithm for the minimization of total power consumption via multiple V DD assignment, multiple V TH assignment, device sizing and stack forcing, while maintaining...
ChipPower: An architecture-level leakage simulator (2004)
Yuh-fang Tsai, Ananth Hegde Ankadi, N. Vijaykrishnan, Mary Jane Irwin, Theo Theocharides
Leakage power is projected to be one of the major challenges in future technology generations. The temperature profile, process variation, and transistor count all have strong impact on the leakage...
An Architecture for Motion Estimation in the Transform Domain (2004)
J. Lee, N. Vijaykrishnan, M. J. Irwin, W. Wolf
In this paper, a novel architecture for transform domain motion estimation is proposed. We derive a recursion equation from the algorithm and wavefront array processors are used to perform motion...
Improving Soft-Error Tolerance of FPGA Configuration Bits (2004)
Suresh Srinivasan, Aman Gayasen, N. Vijaykrishnan, Y. Xie, M. J. Irwin
Abstract — Soft errors that change configuration bits of an SRAM based FPGA modify the functionality of the design. The proliferation of FPGA devices in various critical applications makes it...
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture (2004)
W. Hung, C. Addo-quaye, T. Theocharides, Y. Xie, N. Vijaykrishnan, M. J. Irwin
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP cores or processing...
Efficient VLSI Implementation of Inverse Discrete Cosine Transform (2004)
J. Lee, N. Vijaykrishnan, M. J. Irwin
In this paper, a novel 2-D IDCT architecture based on the energy compaction property of 2-D DCT is proposed. This architecture performs 2-D IDCT directly on the 2-D DCT data set, avoiding the need...
Reducing leakage energy in fpgas using region-constrained placement (2004)
A. Gayasen, Y. Tsai, N. Vijaykrishnan, M. J. Irwin
FPGAs are being increasingly used in a wide variety of applications. While power optimization has been only of secondary importance in many FPGA applications, growing importance of leakage in FPGAs...
A Dual-VDD Low Power FPGA Architecture (2004)
Gayasen Lee Vijaykrishnan, A. Gayasen, K. Lee, N. Vijaykrishnan, M. J. Irwin, T. Tuan
The continuing increase in FPGA size and complexity and the emergence of sub-100nm technology have made FPGA power consumption, both dynamic and static, an important design consideration. In this...
Fault Tolerant Algorithms for Network-On-Chip Interconnect (2004)
Pirretti Link Brooks, M. Pirretti, G. M. Link, R. R. Brooks, N. Vijaykrishnan, M. J. Irwin
As technology scales, fault tolerance is becoming a key concern in on-chip communication. Consequently, this work examines fault tolerant communication algorithms for use in the NoC domain. Two...
Reliability-Aware Co-synthesis for Embedded Systems (2004)
Xie Li Kandemir, Y. Xie, L. Li, N. Vijaykrishnan, M. J. Irwin
As technology scales, transient faults due to single event upsets have emerged as a key challenge for reliable embedded system design. This paper proposes a design methodology that incorporates...
Implications of Technology Scaling on Leakage Reduction Techniques (2004)
Y-f. Tsai, N. Vijaykrishnan, M.J. Irwin
The impact of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) is evaluated by determining limits and benefits, in...
Energy-aware code cache management for memory-constrained Java devices (2003)
G. Chen, G. Chen, N. Vijaykrishnan, M. J. Irwin
that support both interpretation and compiled execution, se-This paper focuses on the influence of memory size limitation on the dynamic translation of Java methods into native code. Specifically, we...
Compiler support for reducing leakage energy consumption (2003)
W. Zhang, N. Vijaykrishnan, M. J. Irwin, V. De
Current trends indicate that leakage energy consumption will be an important concern in upcoming process technologies. In this paper, we propose a compiler-based leakage energy optimization strategy....
Masking the Energy Behavior of DES Encryption (2003)
H. Saputra, N. Vijaykrishnan, M. J. Irwin, R. Brooks, S. Kim, W. Zhang
Smart cards are vulnerable to both invasive and non-invasive attacks. Specifically, non-invasive attacks using power and timing measurements to extract the cryptographic key has drawn a lot of...
Masking the Energy Behavior of DES Encryption (2003)
H. Saputra, N. Vijaykrishnan, M. J. Irwin, R. Brooks, S. Kim, W. Zhang
Smart cards are vulnerable to both invasive and non-invasive attacks. Specifically, non-invasive attacks using power and timing measurements to extract the cryptographic key has drawn a lot of...
N. Vijaykrishnan, Mahmut K, Mary Jane Irwin, Hyun Suk Kim, Wu Ye, David Duarte, ...
Abstract—With the emergence of a plethora of embedded and portable applications, energy dissipation has joined throughput, VLSI layout area, and accuracy/precision as a major design constraint....
Compiler support for reducing leakage energy consumption (2003)
W. Zhang, N. Vijaykrishnan, M. J. Irwin, V. De
Current trends indicate that leakage energy consumption will be an important concern in upcoming process technologies. In this paper, we propose a compiler-based leakage energy optimization strategy....
Analysis of Soft Error Rate in FlipFlops and Scannable Latches (2003)
R. Ramanarayanan, V. Degalahal, N. Vijaykrishnan, M. J. Irwin, D. Duarte
Abstract—Soft the critical charge by increasing the gate capacitance while errors are gaining importance as technology scales. Flip-flops, an important component of pipelined architectures, are...
Interplay of Energy and Performance for Disk Arrays Running Transaction Processing Workloads (2003)
Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasubramaniam, Mahmut Kandemir, Hubertus Franke, N. Vijaykrishnan, ...
The growth of business enterprises and the emergence of the Internet as a medium for data processing has led to a proliferation of applications that are server-centric. The power dissipation of such...
Managing leakage energy in cache hierarchies (2003)
Lin Li, Ismail Kadayif, Yuh-fang Tsai, N. Vijaykrishnan, Mahmut Kandemir, Mary Jane Irwin, ...
Energy management is important for a spectrum of systems ranging from high-performance architectures to low-end mobile and embedded devices. With the increasing number of transistors, smaller feature...
Heap Compression for Memory-Constrained Java Environments (2003)
G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, B. Mathiske, M Wolczko
Java is becoming the main software platform for consumer and embedded devices such as mobile phones, PDAs, TV set-top boxes, and in-vehicle systems. Since many of these systems are memory...
Tracking Object Life Cycle for Leakage Energy (2003)
Optimization Chen Vijaykrishnan, G. Chen, N. Vijaykrishnan, M. J. Irwin
The focus of this work is on utilizing the state of objects during their lifespan in optimizing the leakage energy consumed in the data caches when executing embedded Java applications. Our analysis...
Interplay of Energy and Performance for Disk Arrays Running Transaction Processing Workloads (2003)
Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasubramaniam, Mahmut Kandemir, Hubertus Franke, N. Vijaykrishnan, ...
The growth of business enterprises and the emergence of the Internet as a medium for data processing has led to a proliferation of applications that are server-centric. The power dissipation of such...
Managing Leakage Energy in Cache Hierarchies (2003)
Lin Li, Ismail Kadayif, Yuh-fang Tsai, N. Vijaykrishnan, Mahmut Kandemir, Mary Jane Irwin, ...
Energy management is important for a spectrum of systems ranging from high-performance architectures to low-end mobile and embedded devices. With the increasing number of transistors, smaller feature...
N. Vijaykrishnan, Mahmut Kandemir, Mahmut K, Mary Jane Irwin, Hyun Suk Kim, Wu Ye, ...
With the emergence of a plethora of embedded and portable applications, energy dissipation has joined throughput, VLSI layout area, and accuracy/precision as a major design constraint. Thus,...
On Load Latency in Low-Power Caches (2003)
Soontae Kim Vijaykrishnan, N. Vijaykrishnan, M. J. Irwin, L. K. John
Many of the recently proposed techniques to reduce power consumption in caches introduce an additional level of nondeterminism in cache access latency. Due to this additional latency, instructions...
Energy-aware Compilation and Execution in Java-Enabled Mobile Devices (2003)
G. Chen, B. Kang, N. Vijaykrishnan, M. J. Irwin
Java-enabled wireless devices are preferred for various reasons such as enhanced user experience and the support for dynamically downloading applications on demand. The dynamic download capability...
On Load Latency in Low-Power Caches (2003)
Soontae Kim, N. Vijaykrishnan, M. J. Irwin, L. K. John
Many of the recently proposed techniques to reduce power consumption in caches introduce an additional level of nondeterminism in cache access latency. Due to this additional latency, instructions...
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors (2003)
Lin Li, N. Vijaykrishnan, Mahmut Kandemir, Mahmut K, Mary Jane Irwin, Ismail Kadayif
With shrinking feature size of silicon fabrication technology, architects are putting more and more logic into a single die. While one might opt to use these transistors for building complex single...
Tuning garbage collection for reducing memory system energy in an embedded Java environment (2002)
G. Chen, R. Shetty, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, M. Wolczko
Java has been widely adopted as one of the software platforms for the seamless integration of diverse computing devices. Over the last year, there has been great momentum in adopting Java technology...
Compiler-directed cache polymorphism (2002)
J. S. Hu, N. Vijaykrishnan, M. J. Irwin, H. Saputra, W. Zhang
Classical compiler optimizations assume a xed cache architecture and modify the program to take best advantage of it. In some cases, this may not be the best strategy because each loop nest might...
Partitioned Instruction Cache Architecture for Energy Efficiency (2002)
Soontae Kim, N. Vijaykrishnan, Mahmut Kandemir, Anand Sivasub, Mary Jane Irwin
The demand for high-performance architectures and powerful battery-operated mobile devices has accentuated the need for low power systems. In many media and embedded applications, the memory system...
Scheduler-based DRAM energy management (2002)
V. Delaluz, A. Sivasubramaniam, N. Vijaykrishnan, M. J. Irwin
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operating modes. While...
Predictive Precharging for Bitline Leakage Energy Reduction (2002)
Soontae Kim, N. Vijaykrishnan, M. J. Irwin
Abstract | As technology scales down into deepsubmicron, leakage energy is becoming a dominant source of energy consumption. Leakage energy is generally proportional to the area of a circuit and...
Impact of technology scaling and packaging on dynamic voltage scaling techniques (2002)
D. Duarte, N. Vijaykrishnan, M. J. Irwin, Y-f. Tsai
This paper studies how the effectiveness of various Dynamic Voltage Scaling mechanisms is affected by technology scaling and system activity. We show that V dd scaling maintains its effectiveness...
Compiler-Directed Instruction Cache Leakage Optimization (2002)
W. Zhang, J. S. Hu, V. Degalahal, N. Vijaykrishnan, M. J. Irwin
Excessive power consumption is widely considered as a major impediment to designing future microprocessors. With the continued scaling down of threshold voltages, the power consumed due to leaky...
Energy savings through compression in embedded Java environments (2002)
G. Chen, N. Vijaykrishnan, M. J. Irwin, W. Wolf
Limited energy and memory resources are important constraints in the design of an embedded system. Compression is an useful and widely employed mechanism to reduce the memory requirements of the...
Adaptive Garbage Collection for Battery-Operated Environments (2002)
G. Chen, N. Vijaykrishnan, M. J. Irwin
Energy is an important constraint for battery-operated embedded Java environments. In this work, we show how the garbage collector (GC) can be tuned to reduce the energy consumption of Java...
Compiler-directed cache polymorphism (2002)
J. S. Hu, N. Vijaykrishnan, M. J. Irwin, H. Saputra, W. Zhang
Classical compiler optimizations assume a fixed cache architecture and modify the program to take best advantage of it. In some cases, this may not be the best strategy because each loop nest might...
Compiler-directed array interleaving for reducing energy in multi-bank memories (2002)
V. Delaluz, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam, I. Kolcu Y
With the increased use of embedded/portable devices such as smart cellular phones, pagers, PDAs, hand-held computers, and CD players, improving energy efficiency is becoming a critical issue. To...
Energy savings through compression in embedded Java environments (2002)
G. Chen, N. Vijaykrishnan, M. J. Irwin
Limited energy and memory resources are important constraints in the design of an embedded system. Compression is an useful and widely employed mechanism to reduce the memory requirements of the...
Eac: a compiler framework for high-level energy estimation and optimization (2002)
I. Kadayif, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam
This paper presents a novel Energy-Aware Compilation (EAC) framework that can estimate and optimize energy consumption of a given code taking as input the architectural and technological parameters,...
Eac: a compiler framework for high-level energy estimation and optimization (2002)
I. Kadayif, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam
This paper presents a novel Energy-Aware Compilation (EAC) framework that can estimate and optimize energy consumption of a given code taking as input the architectural and technological parameters,...
Compiler-directed array interleaving for reducing energy in multi-bank memories (2002)
V. Delaluz, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam, I. Kolcu Y
With the increased use of embedded/portable devices such as smart cellular phones, pagers, PDAs, hand-held computers, and CD players, improving energy efficiency is becoming a critical issue. To...
Scheduler-based DRAM energy management (2002)
V. Delaluz, A. Sivasubramaniam, N. Vijaykrishnan, M. J. Irwin
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operating modes. While...
Understanding and Improving Operating System Effects in Control Flow Prediction (2002)
Tao Li, Lizy Kurian John, N. Vijaykrishnan, Juan Rubio
Many modern applications result in a significant operating system (OS) component. The OS component has several implications including affecting the control flow transfer in the execution environment....
A Clock Power Model to Evaluate Impact of Architectural and Technology Optimizations (2002)
David E. Duarte, N. Vijaykrishnan, Mary Jane Irwin
The clock distribution and generation circuitry forms a critical component of current synchronous digital systems and is known to consume at least a quarter of the power budget of existing...
Energy Savings Through Compression in Embedded Java (2002)
Environments Chen Kandemir, G. Chen, N. Vijaykrishnan, M. J. Irwin
Limited energy and memory resources are important constraints in the design of an embedded system. Compression is an useful and widely employed mechanism to reduce the memory requirements of the...
Tuning Garbage Collection in an Embedded Java Environment (2002)
G. Chen, R. Shetty, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, M. Wolczko
Java is being widely adopted as one of the software platforms for the seamless integration of diverse computing devices. Over the last year, there has been great momentum in adopting Java technology...
Adaptive Garbage Collection for Battery-Operated Environments (2002)
Chen Kandemir Vijaykrishnan, G. Chen, N. Vijaykrishnan, M. J. Irwin
Energy is an important constraint for battery-operated embedded Java environments. In this work, we show how the garbage collector (GC) can be tuned to reduce the energy consumption of Java...
Leakage energy management in cache hierarchies (2002)
L. Li, I. Kadayif, Y-f. Tsai, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam
Energy management is important for a spectrum of systems ranging from high-performance architectures to lowend mobile and embedded devices. With the increasing number of transistors, smaller feature...
Hardware and Software Techniques for Controlling DRAM Power Modes (2001)
V. Delaluz, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin
The anticipated explosive growth of pervasive and mobile computing devices that are typically constrained by energy has brought hardware and software techniques for energy conservation into the...
Use of local memory for efficient java execution (2001)
S. Tomar, S. Kim, N. Vijaykrishnan, M. J. Irwin
Java has become a popular choice for implementing various applications that run on mobile and hand-held devices. Optimizing the energy consumption in mobile environments is of critical importance to...
Exploiting VLIW schedule slacks for dynamic and leakage energy reduction (2001)
W. Zhang, N. Vijaykrishnan, M. J. Irwin, D. Duarte, Y-f. Tsai
The mobile computing device market is projected to grow to 16.8 million units in 2004, representing an average annual growth rate of 28 % over the five year forecast period [5]. This brings the...
Energy behavior of Java applications from the memory perspective (2001)
N. Vijaykrishnan, S. Kim, S. Tomar, A. Sivasubramaniam, M. J. Irwin
Permission is granted for noncommercial reproduction of the work for educational or research purposes.
Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries (2001)
Sudhanva Gurumurthi, Ning An, Anand Sivasubramaniam, N. Vijaykrishnan, Mahmut Kandemir, Mary Jane Irwin
A seamless infrastructure for information access and data processing is the backbone for the successful development and deployment of the envisioned ubiquitous/mobile applications of the near future....
Energy-Efficient Instruction Cache using Page-Based Placement (2001)
S. Kim, N. Vijaykrishnan, M. J. Irwin
Energy consumption is a crucial factor in designing batteryoperated embedded and mobile systems. The memory system is a major contributor to the system energy in such environments. In order to...
Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries (2001)
Sudhanva Gurumurthi, N. Vijaykrishnan, Ning An, Mahmut Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
A seamless infrastructure for information access and data processing is the backbone for the successful development and deployment of the envisioned ubiquitous/mobile applications of the near future....
Java runtime systems: Characterization and architectural implications (2001)
Ramesh Radhakrishnan, N. Vijaykrishnan, Lizy Kurian John, Senior Member, Juan Rubio, Jyotsna Sabarinathan
AbstractÐThe Java Virtual Machine (JVM) is the cornerstone of Java technology and its efficiency in executing the portable Java bytecodes is crucial for the success of this technology....
Dynamic Management of Scratch-Pad Memory Space (2001)
J. Ramanujam, M. J. Irwin, N. Vijaykrishnan, I. Kadayif, A. Parikh
Optimizations aimed at improving the efficiency of on-chip memories are extremely important. We propose a compiler-controlled dynamic on-chip scratch-pad memory (SPM) management framework that uses...
Energy behavior of Java applications from the memory perspective (2001)
N. Vijaykrishnan, S. Kim, S. Tomar, A. Sivasubramaniam, M. J. Irwin
With the anticipated dramatic growth of computing devices for mobile and embedded environments, energy conscious hardware and software design has taken center-stage together with performance. At the...
DRAM Energy Management Using Software and Hardware Directed (2001)
Power Mode Control, V. Delaluz, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin
While there have been several studies and proposals for energy conservation for CPUs and peripherals, energy optimization techniques for selective operating mode control of DRAMs have not been fully...
Investigating Memory System Energy Behavior Using Software and Hardware Optimizations (2001)
G. Esakkimuthu, H. S. Kim, M. Kandemir, N. Vijaykrishnan, M. J. Irwin
Memory system usually consumes a significant amount of energy in many battery-operated devices. In this paper, we provide a quantitative comparison and evaluation of the interaction of two hardware...
Energy-driven integrated hardware-software optimizations using SimplePower (2000)
N. Vijaykrishnan, M. J. Irwin, H. S. Kim, W. Ye
With the emergence of a plethora of embedded and portable applications, energy dissipation has joined throughput, area, and accuracy/precision as a major design constraint. Thus, designers must be...
Energy-driven integrated hardware-software optimizations using SimplePower (2000)
N. Vijaykrishnan, M. J. Irwin, H. S. Kim, W. Ye
With the emergence of a plethora of embedded and portable applications, energy dissipation has joined throughput, area, and accuracy/precision as a major design constraint. Thus, designers must be...
Influence of compiler optimizations on system power (2000)
N. Vijaykrishnan, M. J. Irwin, W. Ye
High-level compiler optimizations have been widely used to achieve speedups on array-based codes. Such optimizations are becoming increasingly important in embedded signal processing and multimedia...
The design and use of SimplePower: A cycle-accurate energy estimation tool (2000)
W. Ye, N. Vijaykrishnan, M. J. Irwin
In this paper, we present the design and use of a comprehensive framework, SimplePower, for evaluating the effect of high-level algorithmic, architectural, and compilation tradeoffs on energy. An...
The design and use of SimplePower: A cycle-accurate energy estimation tool (2000)
W. Ye, N. Vijaykrishnan, M. J. Irwin
In this paper, we presen t the design and use of a comprehensiv e framework, SimplePower, for ev aluating the e ect of high-level algorithmic, architectural, and compilation tradeo s on energy. An...
Memory energy management using software and hardware directed power mode control (2000)
V. Delaluz, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin
The anticipated explosive growth of pervasive and mobile computing devices that are typically constrained by energy has brought hardware and software techniques for energy conservation into the...
An energy estimation framework with integrated hardware-software optimizations (2000)
N. Vijaykrishnan, M. J. Irwin, H. Kim, W. Ye
With the emergence of a plethora of embedded and portable applications, energy dissipation has joined throughput, VLSI layout area, and accuracy/precision as a major design constraint. Thus,...
Multiple access caches: Energy implications (2000)
H. S. Kim, N. Vijaykrishnan, M. Kandemir, M. J. Irwin
In this paper, we model and evaluate the energy consumption of three different multiple access cache architectures that target the reduction of access latencies of associative caches. Further, we...
Effect of Compiler Optimizations on Memory Energy (2000)
H. S. Kim, M. J. Irwin, N. Vijaykrishnan
Abstract- Energy optimization has become an important issue in hardware and software design. In particular, optimizing the energy consumed by the memory system has been found to be very important....
The design and use of SimplePower: A cycle-accurate energy estimation tool (2000)
W. Ye, N. Vijaykrishnan, M. J. Irwin
In this paper, we present the design and use of a comprehensive framework, SimplePower, forevaluating the e ect of high-level algorithmic, architectural, and compilation tradeo s on energy. An...
Energy-driven integrated hardware-software optimizations using SimplePower (2000)
N. Vijaykrishnan, M. J. Irwin, H. S. Kim, W. Ye
With the emergence of a plethora of embedded and portable applications, energy dissipation has joined throughput, area, and accuracy/precision as a major design constraint. Thus, designers must be...
Memory energy management using software and hardware directed power mode control (2000)
V. Delaluz, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin
The anticipated explosive growth of pervasive and mobile computing devices that are typically constrained by energy has brought hardware and software techniques for energy conservation into the...
Effect of Compiler Optimizations on Memory Energy (2000)
H. S. Kim, M. J. Irwin, N. Vijaykrishnan
Abstract- Energy optimization has become an important issue in hardware and software design. In particular, optimizing the energy consumed by the memory system has been found to be very important....
Energy-driven integrated hardware-software optimizations using SimplePower (2000)
N. Vijaykrishnan, M. J. Irwin, H. S. Kim, W. Ye
With the emergence of a plethora of embedded and portable applications, energY dissipation has joined throughput, area, and accuracy/precision as a major design constraint. Thus, designers must be...
Influence of compiler optimizations on system power (2000)
N. Vijaykrishnan, M. J. Irwin, W. Ye
High-level compiler optimizations ha ve been widely used to ac hiev e speedups on array-based codes. Suc h optimizations are becoming increasingly important inembedded signal processing and...
Memory energy management using software and hardware directed power mode control (2000)
V. Delaluz, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin
The anticipated explosive growth of pervasive and mobile computing devices that are typically constrained by energy has brought hardware and software techniques for energy conservation into the...
Energy-driven integrated hardware-software optimizations using SimplePower (2000)
N. Vijaykrishnan, M. J. Irwin, H. S. Kim, W. Ye
With the emergence of a plethora of embedded and portable applications, energy dissipation has joined throughput, area, and accuracy/precision as a major design constraint. Thus, designers must be...
Tuning branch predictors to support virtual method invocation in Java (1999)
N. Vijaykrishnan, N. Vijaykrishnan, N. Ranganathan, N. Ranganathan
Rights to individual papers remain with the author or the author's employer. Permission is granted for noncommercial reproduction of the work for educational or research purposes. This copyright...
Execution Characteristics of Just-In-Time Compilers (1999)
Ramesh Radhakrishnan, R. Radhakrishnany, Lizy K. John, Juan Rubio, L. K. Johny, N. Vijaykrishnan
Just-In-Time (JIT) compilers interact with the Java Virtual Machine (JVM) at run time and compile appropriate bytecode sequences into native machine code. Loading and compilation time penalties are...
Architectural Issues in Java Runtime Systems (1999)
R. Radhakrishnan, N. Vijaykrishnan, L.K. John, L. K. Johny, A. Sivasubramaniam
The Java Virtual Machine (JVM) is the corner stone of Java technology, and its efficiency in executing the portable Java bytecodes is crucial for the success of this technology. Interpretation,...
Object-oriented architectural support for a Java processor (1998)
N. Vijaykrishnan, N. Ranganathan, R. Gadekarla
Abstract. In this paper, we propose architectural support for object manipulation, stack processing and method invocation to enhance the execution speed of Java bytecodes. First, a virtual address...
Energy-performance trade-offs for spatial access methods on memory-resident data (1996)
Ning An, Sudhanva Gurumurthi, Anand Sivasubramaniam, N. Vijaykrishnan, Mahmut Kandemir, Mary Jane Irwin
The proliferation of mobile and pervasive computing devices has brought energy constraints into the limelight, together with performance considerations. Energy-conscious design is important at all...
SPRT for Weibull distributed integrated circuit failures
R. Chandramouli, N. Vijaykrishnan, N. Ranganathan
In this paper, we propose a sequential probability ratio test (SPRT) based on a two parameter Weibull distribution for IC failures. The shape parameter of the Weibull distribution characterizes the...