Retargetable Program Profiling Using High Level Processor Models (2008)
Abstract. Program profiling helps in characterizing program behavior for a target architecture. We have implemented a retargetable simulation driven code profiler from a high-level processor...
Compiler-Managed Partitioned Data Caches for Low Power Abstract (2008)
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailored to the...
Data access partitioning for fine-grain parallelism on multicore architectures (2007)
Michael Chu, Rajiv Ravindran, Scott Mahlke
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a single chip requires...
Manjunath Kudlur, Kevin Fan, Michael Chu, Rajiv Ravindran, Nathan Clark, Scott Mahlke
Application-specific instruction set processors (ASIPs) have the potential to meet the challenging cost, performance, and power goals of future embedded processors by customizing the hardware to suit...
Manjunath Kudlur, Kevin Fan, Michael Chu, Rajiv Ravindran, Nathan Clark, Scott Mahlke
Application-specific instruction set processors (ASIPs) have the potential to meet the challenging cost, performance, and power goals of future embedded processors by customizing the hardware to suit...
Systematic register bypass customization for application-specific processors (2003)
Kevin Fan, Nathan Clark, Michael Chu, K. V. Manjunath, Rajiv Ravindran, Mikhail Smelyanskiy, ...
Register bypass provides additional datapaths to eliminate data hazards in processor pipelines. The difficulty with register bypass is that the cost of the bypass network is substantial and grows...
Bitwidth sensitive code generation in a custom embedded accelerator design system (2001)
Scott Mahlke, Rajiv Ravindran, Michael Schlansker, Robert Schreiber, Timothy Sherwood
An ever larger variety of embedded ASICs is being designed and deployed to satisfy an explosively growing demand for new
Bitwidth Cognizant Architecture Synthesis of Custom Hardware Accelerators (2001)
Scott Mahlke, Rajiv Ravindran, Michael Schlansker, Robert Schreiber, Timothy Sherwood
applicationspecific design, architecture synthesis, bitwidth, clustering, embedded system, hardware accelerator, operation scheduling, resource allocation PICO is a system for automatically...
Bitwidth Cognizant Architecture Synthesis of Custom Hardware Accelerators (2001)
Scott Mahlke, Rajiv Ravindran, Michael Schlansker, Robert Schreiber, Timothy Sherwood
application-speci c design, architecture synthesis, bitwidth, clustering, embedded system, hardware accelerator, operation scheduling, resource allocation PICO is a system for automatically...
Bitwidth Cognizant Architecture Synthesis of Custom Hardware Accelerators (2001)
Scott Mahlke, Rajiv Ravindran, Michael Schlansker, Robert Schreiber, Timothy Sherwood
PICO is a system for automatically synthesizing embedded hardware accelerators from loop nests speci ed in the C programming language. A key issue confronted when designing such accelerators is the...
Bitwidth Cognizant Architecture Synthesis of Custom Hardware Accelerators (2001)
Scott Mahlke, Rajiv Ravindran, Michael Schlansker, Robert Schreiber, Timothy Sherwood
Abstract—Program-in chip-out (PICO) is a system for automatically synthesizing embedded hardware accelerators from loop nests specified in the C programming language. A key issue confronted when...
Retargetable cache simulation using high level processor models (2001)
During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simulator. The cache...
Retargetable Program Profiling Using High Level Processor Models (2001)
Program profiling helps in characterizing program behavior for a target architecture. We have implemented a retargetable simulation driven code profiler from a high-level processor description...