Wei Han, A. T. Erdogan, T. Arslan, M. Hasan
Abstract- This paper presents a solution based on parallel-pipelined architectures for high throughput and power efficient FFT IP cores. Low power consumption can be gained through the combination of...
A LOW POWER MMSE RECEIVER FOR MULTI-CARRIER CDMA (2008)
A. C. Mccormick, P. M. Grant, J. S. Thompson, T. Arslan, A. T. Erdogan
The power consumption of a minimum mean square error (MMSE) multi-carrier CDMA receiver implemented in digital hardware is considered. A low power block based architecture is investigated for the...
A Novel Low Power Pipelined Architecture for a MC-CDMA receiver (2008)
M. Hasan, T. Arslan, John Thompson
This paper proposes a novel low power pipelined architecture for a Multi-carrier code division mulriple access (MC-CDMA) receiver. The receiver is based on 64 sub-carriers. It comprises of two blocks...
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Wei Han, T. Arslan, A. T. Erdogan, M. Hasan
This paper proposes two novel parallel-pipelined FFT architectures based on multiplier-less implementation targeting wireless communication applications, such as IEEE 802.11 wireless baseband chip...
LOW POWER DCT IMPLEMENTATION APPROACH FOR VLSI DSP PROCESSORS (2008)
This paper presents an algorithm for the low power implementation of the Discrete Cosine Transform on Single multiplier CMOS DSPs. The algorithm reduces power by a combination of using shift...
A SENSOR SYSTEM ON CHIP FOR WIRELESS MICROSYSTEMS (2008)
L. Wang, N. Aydin, A. Astaras, M. Ahmadian, P. A. Hammond, T. B. Tang, ...
Recent years have seen the rapid development of microsensor technology, system on chip design, wireless technology and ubiquitous computing. When assembled into a complex microsystem the technologies...
ELSEVIER PII: S0026-2692(96) 00010-9 (2008)
Low Power Design, T. Arslan, A. T. Erdogan, D. H. Horrocks
for DSP: methodologies and techniques
In this paper the authors present a hierarchical Automatic Test Pattern Generation (ATPG) system, which searches for a compact set of test patterns, in an otherwise large search-space. A Genetic...
Learning Robot Dynamics for Computed Torque Control Using Local Gaussian Processes Regression (2008)
Nguyen-Tuong, D., Peters, J., Stoica, A., Tunstel, E., Huntsberger, T., Arslan, T., ...
Accurate models of the robot dynamics allow the design of significantly more precise, energy-efficient and more compliant computed torque control for robots. However, in some cases the accuracy of...
A direct-sequence spread-spectrum communication system for integrated sensor microsystems (2005)
Aydin, N., Arslan, T., Cumming, D.R.S.
Some of the most important challenges in health-care technologies have been identified to be development of noninvasive systems and miniaturization. In developing the core technologies, progress is...
High speed max-log-MAP turbo SISO decoder implementation using branch metric normalization (2005)
J. H. Han, A. T. Erdogan, T. Arslan
The authors present a turbo soft-in soft-out (SISO) decoder based on Max-Log maximum a posteriori (ML-MAP) algorithm implemented with sliding window (SW) method. A novel technique based on branch...
Erdogan, “Implementation of a SIC based MC-CDMA base station receiver (2002)
A. C. Mccormick, P. M. Grant, J. S. Thompson, T. Arslan, A. T. Erdogan
Investigation of the performance of uplink multi-carrier code-division multiple access (MC-CDMA) receiver designs
A combined coefficient segmentation and block processing algorithm for low power implementation of FIR digital filters is described in this paper. The algorithm processes data and coefficients in...
Low Power VLSI Implementation of the DCT on Single Multiplier DSP Processors (2000)
A generic multiplication scheme for the low power VLSI implementation of the DCT is described in this paper. The scheme concurrently processes blocks of cosine coefficient and pixel values during the...
Low power system on chip implementation scheme of digital filtering cores (1999)
E. P. Zwyssig, A. T. Erdogan, T. Arslan
The paper describes a scheme for the implementation of low power cores for hearing aid applications. Power saving features of the scheme are two fold. The first due to the utilisation of a...
Power Driven Routing Using a Genetic Algorithm (1999)
Due to the increasing complexity of VLSI circuits and their frequent use in portable applications, energy losses in the interconnections of such circuits have become significant [1]. In the light of...
A Coefficient Segmentation Algorithm for Low Power Implementation of FIR filters (1999)
The authors present a multiplication algorithm for low power implementation of digital filters on CMOS based digital signal processing systems. The algorithm decomposes individual coefficients into...
A genetic framework for the high-level optimisation of low power VLSI DSP systems (1996)
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Structural Cell-based VLSI Circuit Design using a Genetic Algorithm (1996)
Arslan Horrocks, T. Arslan, D. H. Horrocks, E. Ozdemir
A technique for the structural synthesis of VLSI circuits is presented. The technique uses a Genetic Algorithm which utilises a library of devices for the synthesis procedure which proved successful...
Structural Synthesis Of Cell-Based Vlsi Circuits Using A Multi-Objective Genetic Algorithm (1996)
T. Arslan, D. H. Horrocks, E. Ozdemir
: This letter presents the development of a technique which utilises a "Multi-Objective" Genetic Algorithm for the structural synthesis of combinational VLSI circuits by utilising one or...
This paper proposes a new hardware based PGA using order-based crossover which will be capable of optimising a new category of real-time combinatorial problems. One of the few references to such a...
Generating Test Patterns For VLSI Circuits Using A Genetic Algorithm (1994)
Introduction: With increasing complexity of VLSI circuits there is a constant requirement for efficient methods of automatic test pattern generation [1,2]. Genetic algorithms (GAs) have proven...
A Hardware Architecture For A Parallel Genetic Algorithm For Image Registration (1994)
this paper the nature of Parallel Genetic Algorithms is described followed by the application of genetic algorithms to vision systems. A description of a hardware architecture for vision systems is...
A direct-sequence spread-spectrum communication system for integrated sensor microsystems
Aydin, N., Arslan, T., Cumming, D.R.S.
Some of the most important challenges in health-care technologies have been identified to be development of noninvasive systems and miniaturization. In developing the core technologies, progress is...
A direct-sequence spread-spectrum communication system for integrated sensor microsystems
Aydin, N., Arslan, T., Cumming, D.R.S.
Some of the most important challenges in health-care technologies have been identified to be development of noninvasive systems and miniaturization. In developing the core technologies, progress is...