Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply (2009)
M. Vesterbacka, K. Palmkvist, L. Wanhammar, Dragan Maksimović, Vojin G. Oklobdžija, Borivoje Nikolić
[3] J. Pihl and E. J. Aas, “A 300 megasamples/s wave digital filter implementation
Architectural Considerations for Energy Efficiency (2008)
Hoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdžija
The formal analysis of parallelism and pipelining is performed on an 8-bit Add-Compare-Select element of a Viterbi decoder. The results are quantified through a study of the delay and energy...
Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply (2008)
M. Vesterbacka, K. Palmkvist, L. Wanhammar, Dragan Maksimović, Vojin G. Oklobdžija, Borivoje Nikolić
[3] J. Pihl and E. J. Aas, “A 300 megasamples/s wave digital filter implementation